Realtek device drivers for Windows

Realtek PDF datasheets for RTL8169

Welcome to the PDF datasheet, where you can download PDF files for RTL8169. We currently have 197 PDF files available, of which only 3 are for RTL8169. All PDF files come from public sources and from various websites where they have been freely downloadable.
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File type

PDF

File name rtl8169sb_datasheet_1.61.pdf
Datasheet version 1.61
Release 2004-10-06  [October '04]
File size 1,07 MB
Downloaded 1976×

Realtek PDF datasheet RTL8169 for free download

Designed for the following chipset:
- RTL8169SB
- RTL8169SBL
- RTL8169SB-LF
- RTL8169SBL-LF


The Realtek RTL8169SB(L) NIC Gigabit Ethernet controllers combine a triple-speed IEEE 802.3 compliant Media Access Controller (MAC) with a triple-speed Ethernet transceiver, 32-bit PCI bus controller, and embedded memory. With state-of-the-art DSP technology and mixed-mode signal technology, they offer high-speed transmission over CAT 5 UTP cable or CAT 3 UTP (10Mbps only) cable. Functions such as Crossover Detection & Auto-Correction, polarity correction, adaptive equalization, cross-talk cancellation, echo cancellation, timing recovery, and error correction are implemented to provide robust transmission and reception capability at high speeds.

The devices support the PCI v2.3 and CardBus (RTL8169SBL only) bus interfaces for host communications with power management, and comply with the IEEE 802.3 specification for 10/100Mbps Ethernet and the IEEE 802.3ab specification for 1000Mbps Ethernet. They also support an auxiliary power auto-detect function, and will auto-configure related bits of the PCI power management registers in PCI configuration space.

They support the Advanced Configuration Power management Interface (ACPI)--power management for modern operating systems that are capable of Operating System-directed Power Management (OSPM)--to achieve the most efficient power management possible. PCI Message Signaled Interrupt (MSI) is also supported.

In addition to the ACPI feature, the RTL8169SB(L) supports remote wake-up (including AMD Magic Packet, Re-LinkOk, and Microsoft® Wake-up frame) in both ACPI and APM (Advanced Power Management) environments. The LWAKE pin provides four different output signals including active high, active low, positive pulse, and negative pulse. The versatility of the LWAKE pin provides motherboards with Wake-On-LAN (WOL) functionality. To support WOL from a deep power down state (e.g. D3cold, i.e. main power is off and only auxiliary exists), the auxiliary power source must be able to provide the required power for the RTL8169SB(L).

The RTL8169SB(L) is fully compliant with Microsoft® NDIS5 (IP, TCP, UDP) Checksum and Segmentation Task-offload features, and supports IEEE 802 IP Layer 2 priority encoding and 802.1Q Virtual bridged Local Area Network (VLAN). The above features contribute to lowering CPU utilization, especially benefiting performance when in operation on a network server. Also, the devices boost their PCI performance by supporting PCI Memory Read Line & Memory Read Multiple when transmitting, and Memory Write and Invalidate when receiving. To better qualify for server use, the RTL8169SB(L) support the PCI Dual Address Cycle (DAC) command when the assigned buffers reside at a physical memory address higher than 4 Gigabytes.



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Download PDFfrom 2004-10-06



File type

PDF

File name rtl8169s_datasheet_1.7.pdf
Datasheet version 1.7
Release 2004-08-12  [August '04]
File size 990,93 KB
Downloaded 441×

Realtek PDF datasheet RTL8169 for free download

Designed for the following chipset:
- RTL8169S-32
- RTL8169S-64


The Realtek RTL8169S-32 and RTL8169S-64 combine a triple-speed IEEE 802.3 compliant media access controller (MAC) with a triple-speed Ethernet transceiver, 32(64)-bit PCI bus controller, and embedded memory. With state-of-the-art DSP technology and mixed-mode signal technology, they offer high-speed transmission over CAT 5 UTP cable or CAT 3 UTP (10Mbps only) cable. Functions such as Crossover Detection & Auto-Correction, polarity correction, adaptive equalization, cross-talk cancellation, echo cancellation, timing recovery, and error correction are implemented to provide robust transmission and reception capability at high speeds.

The devices support the PCI v2.2 bus interface for host communications with power management and are compliant with the IEEE 802.3 specification for 10/100Mbps Ethernet and the IEEE 802.3ab specification for 1000Mbps Ethernet. They support an auxiliary power auto-detect function, and will auto-configure related bits of the PCI power management registers in PCI configuration space.

They support the Advanced Configuration and Power Interface (ACPI)--power management for modern operating systems that are capable of Operating System directed Power Management (OSPM)--to achieve the most efficient power management possible.

In addition to the ACPI feature, the RTL8169S-32 and RTL8169S-64 support remote wake-up (including AMD Magic Packet, Re-LinkOk, and Microsoft® Wake-up frame) in both ACPI and APM (Advanced Power Management) environments. The LWAKE pin provides four different output signals including active high, active low, positive pulse, and negative pulse. The versatility of the LWAKE pin provides motherboards with Wake-On-LAN (WOL) functionality. To support WOL from a deep power down state (e.g. D3cold, i.e. main power is off and only auxiliary exists), the auxiliary power source must be able to provide the needed power for the RTL8169S-32 and RTL8169S-64.

The RTL8169S is fully compliant with Microsoft® NDIS5 (IP, TCP, UDP) Checksum and Segmentation Task-offload features, and supports IEEE 802.1Q Virtual bridged Local Area Network (VLAN). The above features contribute to lowering CPU utilization, especially benefiting performance when in operation as a server network card. The devices also boost their PCI performance by supporting PCI Memory Read Line & Memory Read Multiple when transmitting, and Memory Write and Invalidate when receiving. To better qualify as a server card, the RTL8169S-32 and RTL8169S-64 support the PCI Dual Address Cycle (DAC) command when the assigned buffers reside at a physical memory address higher than 4 Gigabytes.



Click on the download icon to start downloading the PDF file.
This is not a driver, but technical information or information about the selected product.
The link to the documentation in PDF format is functional for the next 15 minutes!

Download PDFfrom 2004-08-12




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