Realtek device drivers for Windows

Realtek PDF datasheets for RTL8196

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File type


File name rtl8196e_datasheet_1.0.pdf
Datasheet version 1.0
Release 2012-06-29  [June '12]
File size 1,38 MB

Realtek PDF datasheet RTL8196 for free download

Designed for the following chipset:
- RTL8196E-CG

The RTL8196E-CG is an integrated System-on-a-Chip (SoC) Application Specific Integrated Circuit (ASIC) L2 5-Port Ethernet switch. An RLX4181 CPU is embedded and the clock rate can be up to 400MHz. To improve computational performance, a 16Kbyte I-Cache, 8Kbyte D-Cache, 16Kbyte I-MEM, and 8Kbyte D-MEM are provided. A standard 5-signal P1149.1 compliant EJTAG test interface is supported for CPU testing and software development.

The RTL8196E provides five ports (ports 0~4), integrated with five physical layer transceivers for 10Base-T and 100Base-TX. Each port of the RTL8196E may be configured as a LAN or WAN port.

The RTL8196E supports flexible IEEE 802.3x full-duplex flow control and optional half-duplex backpressure control. For full-duplex, standard IEEE 803.3x flow control will enable pause ability only when both sides of UTP have auto-negotiation ability and have enabled pause ability. The RTL8196E also provides optional forced mode IEEE 802.3x full-duplex flow control. Based on optimized packet memory management, the RTL8196E is capable of Head-Of-Line blocking prevention.

L2 Switch Features: The RTL8196E contains a 1024-entry address look-up table with a 10-bit 4-way XOR hashing algorithm for address searching and learning. Auto-aging of each entry is provided and the aging time is around 300~450 seconds.

The RTL8196E supports IEEE 802.3az, also known as Energy Efficient Ethernet (EEE). IEEE 802.3az operates with the IEEE 802.3 Media Access Control (MAC) Sublayer to support operation in Low Power Idle mode. When the Ethernet network is in low link utilization, EEE allows systems on both sides of the link to save power. Green Ethernet power saving provides: link-on and dynamic detection of cable length, and dynamic adjustment of power required for the detected cable length. This feature provides high performance with minimum power consumption. The RTL8196E also implements link-down power saving on a per-port basis, greatly cutting power consumption when the network cable is disconnected.

For peripheral interfaces, two 16550-compatible UARTs are supported, and a 16-byte FIFO buffer is provided. USB OTG (On-The-Go) controllers are embedded in the RTL8196E to provide OTG functionality. In addition, one USB PHY is embedded in the RTL8196E.

An MDI/MDIX auto crossover function is supported. For accessing high-speed devices, the RTL8196E provides one PCI Express host to access a PCI Express interface.

The RTL8196E requires only a single 25MHz crystal or 40MHz clock input for the system PLL. The RTL8196E also has two hardware timers and one watchdog timer to provide accurate timing and watchdog functionality. For extension and flexibility, the RTL8196E supports up to 16 GPIO pins.

The RTL8196E is provided in a Low Profile Plastic Quad Flat Package, 128-Lead (LQFP128) package and requires only a 3.3V external power supply. The built-in SWR or LDO 3.3V to 1.0V can be used for the RTL8196E system core power.

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