Realtek device drivers for Windows

Realtek PDF datasheets for RTL8305

Welcome to the PDF datasheet, where you can download PDF files for RTL8305. We currently have 197 PDF files available, of which only 4 are for RTL8305. All PDF files come from public sources and from various websites where they have been freely downloadable.
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File type

PDF

File name rtl8305nb_datasheet_1.0.pdf
Datasheet version 1.0
Release 2012-10-16  [October '12]
File size 741,19 KB
Downloaded 12×

Realtek PDF datasheet RTL8305 for free download

Designed for the following chipset:
- RTL8305NB-CG

The RTL8305NB is a 5-port 10/100M Ethernet switch controller that integrates memory, five MACs, and five physical layer transceivers for 10Base-T and 100Base-TX operation into a single chip. In order to accomplish diagnostics in complex network systems, the RTL8305NB provides a loopback feature in each port.
The RTL8305NB supports several a dvanced QoS functions with four-level priority queues to improve multimedia or real-time networking applications, including:
- Multi-priority assignment
- Differential queue weight
- Port-based rate limitation
- Queue-based rate limitation

The RTL8305NB supports 16 VLAN groups. These can be configured as port-based VLANs and/or 802.1Q tag-based VLANs. The RTL8305NB also supports VLAN learning, with four Independent VLAN Learning (IVL) filtering databases.

The RTL8305NB contains a 2K-entry address lookup table. A 4-way associative hash algorithm avoids hash collisions and maintains forwarding performance. Maximum packet length can be 2048 bytes. Three types of independent storm filter are provided to filter packet storms, and an intelligent switch engine prevents Head-of-Line blocking problems.

The RTL8305NB supports Energy-Efficient Ethernet mode (EEE; defined in IEEE 802.3az) to minimize system power consumption. Energy-Efficient Ethernet (EEE) supports Low Power Idle Mode. When Low Power Idle Mode is enabled, systems on both sides of the link can disable portions of the functionality and save power during periods of low link utilization.

To simplify the peripheral power circuit, the RTL8305NB integrates one LDO regulator to generate 1.0V from a 3.3V input power, and needs only one external diode.



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Download PDFfrom 2012-10-16



File type

PDF

File name rtl8305sbd_datasheet_1.2.pdf
Datasheet version 1.2
Release 2003-07-10  [July '03]
File size 808,15 KB
Downloaded

Realtek PDF datasheet RTL8305 for free download

Designed for the following chipset:
- RTL8305SB-ver.D

The RTL8305SB Ver.D is a 5-port Fast Ethernet switch controller that integrates memory, five MACs, and five physical layer transceivers for 10Base-T and 100Base-TX operation into a single chip. All ports support 100Base-FX, which shares pins (TX+-/RX+-) with UTP ports and needs no SD+/- pins, a development using Realtek proprietary technology. To compensate for the lack of auto-negotiation in 100Base-FX applications, the RTL8305SB Ver.D can be forced into 100Base-FX half or full duplex mode, and can enable or disable flow control in fiber mode.

The five ports are separated into 3 groups (GroupX/GroupY/Port4) for flexible port configuration using strapping pins upon reset. The SetGroup pin is used to select port members in GroupX and GroupY. When the port members have been determined, you may use a mode selection pin (GxMode/Gymode/P4Mode[1:0]) to select operating interfaces such as 10/100Base-TX, 100Base-FX. Each group has 4 pins for selecting initial port status (ANEG/Force, 100/10, Full/Half, Enable/Disable Flow Control) upon reset. Upon reset, in addition to using strapping pins, the RTL8305SB Ver.D also can be configured with an EEPROM or read/write operation by a CPU through the MDC/MDIO interface

The fifth port (port4) supports an external MAC and an external PHY interface. The external MAC interface can be set to PHY mode MII, PHY mode SNI, or MAC mode MII to work with a routing engine, HomePNA, or VDSL transceiver. The external PHY interface can be set to PHY mode MII in the digital interface, and UTP or fiber in the differential interface. In order to provide diagnostics in complex network systems, the RTL8305SB Ver.D also features a loopback function in each port for a variable CPU system.

The RTL8305SB Ver.D contains a 1K entry address look-up table and supports a 16-entry CAM to avoid hash collisions and to maintain forwarding performance. The RTL8305SB Ver.D supports IEEE 802.3x full duplex flow control and back-pressure half duplex flow control. A broadcast storm filtering function is provided to filter unusual broadcast storm issues and an intelligent switch engine prevents Head-Of-Line blocking problems.



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The link to the documentation in PDF format is functional for the next 15 minutes!

Download PDFfrom 2003-07-10




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