Realtek PDF datasheets for RTL8671

The Realtek RTL8671B/ RTL8671BH are integrated SoC featuring a RISC, an ADSL2+ Discrete Multi-tone (DMT) data-pump, a hardware-based ATM Segmentation and Reassembly (SAR), two 10/100Mbps IEEE 802.3 compliant MACs with an embedded Ethernet transceiver, and a USB PHY port. Mated with the Realtek RTL8271B (ADSL2+ Analog Front End), RTL8671B / RTL8671BH provide a low cost integrated solution for ADSL2+ CPE modems, routers, or gateways.

RTL8671B / RTL8671BH encompass high-performance DSP technologies, optimized mix-signal designs, and an efficient architecture to provide a seamless WAN to LAN router controller. The embedded RISC network processor supports the MIPS I instruction set along with DSP extensions and achieves a 340MHz clock rate in a six-stage pipeline to support layer 2, 3, and other upper layer applications.

The DMT engine supports the upstream data rate from 32kbp to above 3Mbps and the downstream data rate from 32kbps to above 24Mbps throughput, and complies with:
- ANSI T1.413 Issue 2
- ITU-T G.992.1 (G..dmt) Annexes A and B
- G.992.2 (G..lite) Annexes A and B
- G.992.3 ADSL2 (G.dmt.bis) Annexes A, B, I, J, L, and M
- G.992.4 ADSL2 (G.lite.bis)
- G.992.5 ADSL2+

The Ethernet interface offers high-speed transmission over CAT-5 UTP cable or CAT-3 UTP (10Mbps only) cable. Ethernet functions such as Crossover Detection & Auto-Correction and polarity correction are implemented to provide robust transmission and reception capability at high speeds.